1. Field
Exemplary embodiments of the present invention relate to an image sensor (IS), and more particularly, to an integrator type ramp signal generator suitable for a single slope analog-to-digital converter (ADC) and a complementary metal oxide semiconductor (CMOS) IS using the same.
2. Description of the Related Art
Single slope ADCs (S-ADC) are generally used in CMOS ISs (CISs) and CIS products. As CISs continue the trend toward higher frame rates and are implemented in various ways, the specifications required for the market become stricter.
In one example, when a ramp signal generator is realized using a current steering digital-to-analog converter (DAC) in the CIS using the S-ADC, it is necessary to adjust the current to adjust the gain of the CIS.
As the gain of the CIS increases, the slope the ramp voltage decreases because the current flowing through the resistor is reduced to generate the ramp voltage.
In order to achieve high frame rate, high resolution, and high gain in the existing CISs, a lot of power and chip area is required.
According to conventional technologies for solving such problems, the CIS is realized using an integrator type ramp signal generator. However, the conventional integrator type ramp signal generator has a problem in that the size of the feedback capacitor is large and occupies a lot of chip area.